|
ð 0000:00:03.0:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.2:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.3:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.4:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.5:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.6:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.7:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.0:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.2:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.3:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.4:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.5:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.6:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.7:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.0:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.2:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.3:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.4:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.5:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.6:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.7:pcie001
|
-- |
drwxr-xr-x |
|
|
ð bind
|
4K |
--w------- |
|
|
ð uevent
|
4K |
--w------- |
|
|
ð unbind
|
4K |
--w------- |
|